Mixel is hiring.Mixel is seeking exceptional, self-driven, team members who are eager to work on cutting ed
ge projects utilizing the latest technologies and tools. If you have Mixed-Signal experience and project management experience, besides being motivated, energetic, and eager to grow in your profession, then come join our team at Mixel and experience working with teams from Silicon Valley and customers around the globe.
Successful applicants will work with highly experienced engineers on the ground floor of a growing company, developing IP cores in the areas of high-performance, low-power PHYs.
Play a critical part in Mixel’s next phase of growth and contribute to its long term success. This can be an once-in-a-lifetime opportunity for the right candidate, and can rapidly lead to larger responsibilities and rewards. Work with Mixed-signal Engineers with decades of experience, on exciting projects designing Mixed-signal CMOS IP cores and Integrated Circuits.
Join Mixel and see your designs working in new and exciting commercially available products. We are enabling the next generation of mobile platforms, IoT, automotive, and wearable.
If you are an intelligent, motivated, and hardworking engineer that would like to be part of an outstanding team, and would enjoy working in an exciting, friendly, professional, fast-paced, and technically challenging environment, then we urge you to email us your resume.
Work Scope:
- Contribute as a team player in the development and design of a wide range of Mixed Signal Interface IPs products (SerDes, MIPI, DDR, LVDS... and others).
- Responsible of physical implementation of Mixed Signal circuits
- Work closely with design engineers in the custom layout, physical design and verification of high speed SerDes, TX, RX, PLL, DLL, CDR, LVDS and other mixed signal integrated circuits.
- Plan the placement of major circuit components in an overall physical design.
- Work on floor plan and power plan of Analog blocks and PHY
- Perform LVS, DRC, DFM, ERC and ERC using physical verification tools.
- Execute methodology checks using PERC.
- Help in new PDK evaluations, setting up project layout environment.
- Help in automation of custom layout and porting using scripting languages
Qualifications
- BS from one of following majors: Electronics Engineering, Telecommunications, Mechatronics, Physics, Automation & Control or Computer Science.
- Has 0-3 years of experience in CMOS Analog/Memory layouts.
- For entry level positions, recent graduates with experience in areas that are cross-trainable to Analog Design may be considered, such as: PCB Design, Electronics, Test Engineers, Mechatronics Engineers. However, in these cases, a strong academic record is required.
- Good at conversational and written English
- High interest in a semiconductor career path
- Loves solving technical problems, is a good team player, has a growth mindset (willing to receive constructive feedback and improve), and strives for excellence.
- Is respectful, patient, and easygoing
Junior Layout Engineer
About the job:
- Contribute as a team player in the development and design of a wide range of Mixed Signal Interface IPs products (SerDes, MIPI, DDR, LVDS ... and others).
- Responsible for the schematic design, simulation, and verification of blocks in a high-speed mixed-signal IP (Transmitter, Receiver, Serdes, PLL, DLL, CDR, CTLE, FFE/DFE, Clocks, regulators, Bandgap Reference, DAC ...).
- Note: We have a very broad list of designs that you can learn and gain experience from.
- Work in close cooperation with System Architects, Chip Architects, Digital IC designers and Physical IC Designers to deliver on time and according to required specifications.
- Generate the required documentation and contribute to the validation and debugging of the fabricated silicon.
- Work independently and methodically on analyzing design, tool, and technology problems, identifying the best solutions, and implementing the solutions in a repeatable fashion that integrates well within the implementation flow.
Qualifications:
- BS/MS from one of following majors: Electronics Engineering, Telecommunications, Mechatronics, Physics, Automation & Control or Computer Science.
- Has 0-3 years of experience in CMOS Analog/Memory designs.
- For entry level positions, recent graduates with experience in areas that are cross-trainable to Analog Design may be considered, such as: Embedded System, Electronics, Test Engineers, Mechatronics Engineers, PCB design. However, a strong academic record is required.
- Good at conversational and written English Has high interest in IC design
- Loves solving technical problems, is a good team player, has a growth mindset – willing to take constructive feedback and improve, and strives for excellence.
- Is respectful, patient, and easygoing.
Junior Layout Engineer
Work Scope:
- Upon successful completion of the internship, candidates should:
- Have fundamental knowledge of IC design
- Have fundamental knowledge of Mixed-signal IC design and layout
- Acquire soft skills to become successful in IC design
- Complete a mini IC project to apply coursework in a real-world environment and to learn about IC design flow, and to build a real design from beginning to end. Includes support for final year students for graduate thesis
- Acquire tangible experience on live projects and work under the mentorship of experienced engineers
Qualifications:
- Final year student or recent graduate from one of the following majors: Electronics Engineering, Telecommunications, Mechatronics, Physics, Automation & Control or Computer Science
- Preferred GPA is from 3.2/4.0. Candidates with a GPA below 3.2 may be considered in the following cases:
- Has real experience in Analog IC design (please include in the CV)
- Graduated from a Gifted high school with Mathematics, Informatic or Physics major
- Won prizes in Physics, Mathematics, or Informatic at the national, province, or city level during high school
- Basic knowledge about CMOS, Analog, Digital IC design is a plus
- Familiarity with IC design EDA tools (Mentor, Cadence, Synopsys) is a plus
- Good at conversational and written English
- Loves solving technical problems, is a good team player, has a growth mindset (willing to receive constructive feedback and improve), and strives for excellence
- Has high interest in IC design.
- Is respectful, patient and easygoing
IC Design Intern
Work Scope:
- New IPs requirements analysis and system/architecture definition.
- Building system-level models for validating architectural decisions/trade-offs.
- Complete leadership of projects or sub-systems covering all aspects of planning, status & milestones follow-up.
- Providing mentorship and technical leadership.
- Providing support and guidance for Post-Silicon bench testing/characterization.
- Leading and supporting technical communication channels with customers, vendors, etc...
- Introducing & implementing methodology modifications for enhancing the efficiency of Mixel’s design process & IPs robustness.
Qualifications:
- BSc in Electronics/Communication with 5+ years of experience.
- Hands-on knowledge & experience in A/MS/RF building blocks (PLLs, CDRs, Drivers, AFEs, Biasing & Power Management)
- Strong knowledge of IC design flow using Mentor & Cadence tools.
- Strong knowledge of A/MS behavioral modeling.
- Strong communication, leadership, and analytical skills.
- Experience with Matlab/Simulink is a plus.
- Experience with advanced FinFET process nodes is a plus.
CAD Senior Engineer responsibilities include developing, enhancing, and maintaining a wide variety of EDA tool infrastructure and flows
Work Scope:
- New IPs requirements analysis and system/architecture definition.
- Building system-level models for validating architectural decisions/trade-offs.
- Complete leadership of projects or sub-systems covering all aspects of planning, status & milestones follow-up.
- Providing mentorship and technical leadership.
- Providing support and guidance for Post-Silicon bench testing/characterization.
- Leading and supporting technical communication channels with customers, vendors, etc...
- Introducing & implementing methodology modifications for enhancing the efficiency of Mixel’s design process & IPs robustness.
Qualifications:
- BSc in Electronics/Communication with 7+ years of experience.
- Hands-on knowledge & experience in A/MS/RF building blocks (PLLs, CDRs, Drivers, AFEs, Biasing & Power Management)
- Strong knowledge of IC design flow using Mentor & Cadence tools.
- Strong knowledge of A/MS behavioral modeling.
- Strong communication, leadership, and analytical skills.
- Experience with Matlab/Simulink is a plus.
- Experience with advanced FinFET process nodes is a plus.
CAD Senior Engineer responsibilities include developing, enhancing, and maintaining a wide variety of EDA tool infrastructure and flows
Work Scope:
- New IPs requirements analysis and system/architecture definition.
- Building system-level models for validating architectural decisions/trade-offs.
- Complete leadership of projects or sub-systems covering all aspects of planning, status & milestones follow-up.
- Providing mentorship and technical leadership.
- Providing support and guidance for Post-Silicon bench testing/characterization.
- Leading and supporting technical communication channels with customers, vendors, etc...
- Introducing & implementing methodology modifications for enhancing the efficiency of Mixel’s design process & IPs robustness.
Qualifications:
- BSc in Electronics/Communication with 10+ years of experience.
- Hands-on knowledge & experience in A/MS/RF building blocks (PLLs, CDRs, Drivers, AFEs, Biasing & Power Management)
- Strong knowledge of IC design flow using Mentor & Cadence tools.
- Strong knowledge of A/MS behavioral modeling.
- Strong communication, leadership, and analytical skills.
- Experience with Matlab/Simulink is a plus.
- Experience with advanced FinFET process nodes is a plus.
CAD Senior Engineer responsibilities include developing, enhancing, and maintaining a wide variety of EDA tool infrastructure and flows
Job Code
- EG_LAIP_05
- Cairo, Egypt
- Team planning and team member resource utilization.
- Conduct weekly meetings with his team members to follow up on the progress of assigned tasks.
- Attend lead status meetings where the different aspects of the projects are discussed & provide clear status of his team’s assigned projects.
- Resolving all technical and managerial issues within the team.
- Monitor the project's load on the team members and act/organize accordingly, to remove stress, or retain balance/fairness in the distribution of workload after agreement with Project Leads, and Team Manager.
- Perform continuous mentoring through proper performance review standards and process, sets goals, areas for new training, skill checks, the development plan for each team member to help them improve their performance to support the organization's success.
- B.Sc./M.Sc. in Electronics Engineering
- 8+ Years of experience in custom IC layout techniques or EDA tools or relevant experience
- Knowledge of EDA tools used in analog IC design
- Knowledge of Physical verification DRC/LVS/DFM/ERC/MRC/ESD/IO
- Knowledge of Analog design techniques
- Strong knowledge of Unix/Linux operating system
- Project management experience is required.
- Strong knowledge of Shell scripting/programming languages
Job Code EG_LAIP_05 Location Cairo, Egypt About the Job Team planning and team member resource utilization. Conduct weekly meetings with his team members to follow up on the progress of assigned tasks...
Job Code
- EG_LAIP_01
- Cairo, Egypt
- Responsible for the physical implementation of Mixed Signal circuits
- Work closely with design engineers in the custom layout, physical design, and verification of high-speed SerDes, PLL, CDR, LVDS, and other mixed-signal integrated circuits.
- Plan the placement of major circuit components in an overall physical design.
- Work on floor plan and power plan of Analog blocks and PHY
- Perform LVS, DRC, DFM, and ERC using the physical verification tools.
- Execute methodology checks using PERC
- Help in automation of custom layout and porting using scripting languages
- Bachelor’s degree in Electronics Engineering.
- Years of experience in the same field: 0-4 Years of experience in custom IC layout techniques.
- English Language Proficiency: Fluency
- Knowledge of basic analog design techniques is essential.
- Desirable Qualifications and Experience:
-
- Strong knowledge of Shell scripting/programming languages
- Strong knowledge of Unix/Linux operating systems.
-
Job Code EG_LAIP_01 Location Cairo, Egypt About the Job Responsible for the physical implementation of Mixed Signal circuits Work closely with design engineers in the custom layout, physical design, a...
Job Code
- EG_LAIP_03
- Cairo, Egypt
- Responsible for physical implementation (layout) of Mixed Signal circuits.
- Perform LVS, DRC, DFM, and ERC using the physical verification tools.
- Plan the placement of major circuit components in an overall physical design.
- Work on Floor planning and Power planning of Analog blocks and PHY.
- Work with design engineers to ensure layout quality.
- Release design to customers and generating necessary views.
- Should lead automation effort of custom layout and porting using scripting languages.
- Contribute in the internal design reviews to ensure compliance to the company’s layout design process
- Can lead the layout effort technically in one of the active projects
- Contribute to the layout process improvement
- Bachelor or Master’s degree of: Electronics Engineering.
- Years of experience in the same field: minimum 5 Years of experience in custom IC layout techniques or EDA tools or relevant experience
- English Language Proficiency: Fluency
- Knowledge of EDA tools used in analog IC design
- Knowledge of Physical verification DRC/LVS/DFM/ERC/MRC/ESD/IO
- Knowledge of Analog design techniques
- knowledge of Unix/Linux operating system
- Strong knowledge of Shell scripting/programming language
Job Code EG_LAIP_03 Location Cairo, Egypt About the Job Responsible for physical implementation (layout) of Mixed Signal circuits. Perform LVS, DRC, DFM, and ERC using the physical verification tools....
Job Code
- EG_LAIP_02
- Cairo, Egypt
- Responsible of physical implementation (layout) of mixed-signal circuits
- Work with design engineers to ensure layout quality
- Plan the placement of major circuit components in an overall physical design
- Work on floor planning and power planning of analog blocks and PHY
- Perform LVS, DRC, DFM, and ERC using the physical verification tools
- Conduct layout reviews with team members and front end team members
- Release design to customers and generating necessary views
- Lead automation of custom layout and porting using scripting languages
- B.Sc./M.Sc. in Electronics Engineering
- 4-9 Years of experience in custom IC layout techniques or EDA tools or relevant experience
- Knowledge of physical verification DRC/LVS/DFM/ERC/MRC/ESD/IO
- Knowledge in basic analog design techniques & EDA tools is essential
- Strong knowledge of Shell scripting/programming languages
- Strong knowledge of Unix/Linux operating systems
Layout Senior Engineer responsibilities include being responsible of physical implementation (layout) of mixed-signal circuits