The Mixel MIPI M-PHY (MXL-M-PHY-MIPI) is a high-frequency low-power, Physical Layer IP that supports the MIPI® Alliance Standard for M-PHY. The IP can be used as a physical layer for many applications, including interfaces for display, camera, audio, video, memory, power management and communication between Baseband to RFIC.

It supports the following standards: DigRF v4, CSI-3, DSI-2, Uniport-M (UniPro1.41 and 1.6) and JC-64.1 UFS. By using efficient BURST mode operation with scalable speeds, significant power savings can be obtained. Selection of signal slew rate and amplitude allows reduction of EMI/RFI, while maintaining low bit error rates.

M-PHY Options:

MIPI M-PHY Spec Type I and II Modules
MIPI M-PHY Specification Eye Diagram M-PHY_Chip

The Mixel M-PHY Features:

  • Supports the MIPI Standard for MIPI M-PHY Specification v3.0
  • Dual-simplex point-to-point interface with ultra low voltage differential signaling
  • Slew-rate control for EMI reduction
  • Supports all HS modes (HS GEAR 1-3, Series A/B)
  • Supports all Type-I LS modes (PWM GEAR 0-7)
  • Supports Type-II LS mode (SYS)
  • 1-6Gbps data rate in HS mode
  • 0.01-576Mbps data rate in LS mode
  • Supports (8b10b) symbol encoding and decoding
  • Supports the use of optical media converters
  • Modular design to allow for all possible configurations
  • Designed to be able to operate with independent local reference clocks at each side, but suitable to exploit the benefits of a shared reference clock
  • Supports wide range of common reference frequencies
  • Low power dissipation