Careers

• EG_LAIP_04

• Cairo, Egypt

• Team planning and team member resource utilization.
• Conduct weekly meetings with his team members to follow up on the progress of assigned tasks.
• Attend lead status meetings where the different aspects of the projects are discussed & provide clear status of his team’s assigned projects.
• Resolving all technical and managerial issues within the team.
• Monitor the project's load on the team members and act/organize accordingly, to remove stress, or retain balance/fairness in the distribution of workload after agreement with Project Leads, and Team Manager.
• Perform continuous mentoring through proper performance review standards and process, sets goals, areas for new training, skill checks, the development plan for each team member to help them improve their performance to support the organization's success.

• B.Sc./M.Sc. in Electronics Engineering
• 6+ Years of experience in custom IC layout techniques or EDA tools or relevant experience
• Knowledge of EDA tools used in analog IC design
• Knowledge of Physical verification DRC/LVS/DFM/ERC/MRC/ESD/IO
• Knowledge of Analog design techniques
• Strong knowledge of Unix/Linux operating system
• Project management experience is required.
• Strong knowledge of Shell scripting/programming languages

• EG_ ASIV_04

• Cairo, Egypt

• B.Sc. or M.Sc. in Electronics Engineering
• 5+ Years of experience in developing SV-based verification environments. 
• Strong knowledge of Verilog, System Verilog, and object-oriented 
• Computer skills required: Unix/Linux operating system
• Strong knowledge of Verilog, System Verilog, and object-oriented programming languages
• Knowledge of at least one standard verification methodology (such as VMM, OVM, or UVM)
• Familiarity with RTL design, synthesis, and CDC analysis is a plus
• Working knowledge of shell, Perl, and TCL scripting is a plus
• Experience with clock domain crossing and reset architecture. 

• ASIV_01

• Cairo, Egypt

• Develop test plan from specification and architect system-level verification environments
• Develop test-bench components, and coverage metrics
• Execute RTL/Gate level simulations and analyze results
• Work with the mixed-signal team on the co-simulation and verification of mixed-signal IPs
• Contribute to design/verification process automation

• B.Sc. in Electronics/Computer Engineering
• Years of experience in the same field: 0-4 Years of experience in developing SV-based verification environments
• English Language Proficiency: Fluency
• Computer skills required: Unix/Linux operating system
• Strong knowledge of Verilog, System Verilog, and object-oriented programming languages
• Knowledge of at least one standard verification methodology (such as VMM, OVM, or UVM)
• Familiarity with RTL design, synthesis, and CDC analysis is a plus
• Working knowledge of shell, Perl, and TCL scripting is a plus

• EG_LAIP_03

• Cairo, Egypt

• Responsible for physical implementation (layout) of Mixed Signal circuits.
• Perform LVS, DRC, DFM, and ERC using the physical verification tools.
• Plan the placement of major circuit components in an overall physical design.
• Work on Floor planning and Power planning of Analog blocks and PHY.
• Work with design engineers to ensure layout quality.
• Release design to customers and generating necessary views.
• Should lead automation effort of custom layout and porting using scripting languages.
• Contribute in the internal design reviews to ensure compliance to the company’s layout design process
• Can lead the layout effort technically in one of the active projects
• Contribute to the layout process improvement

• Bachelor or Master’s degree of: Electronics Engineering.
• Years of experience in the same field: minimum 5 Years of experience in custom IC layout techniques or EDA tools or relevant experience
• English Language Proficiency: Fluency
• Knowledge of EDA tools used in analog IC design
• Knowledge of Physical verification DRC/LVS/DFM/ERC/MRC/ESD/IO
• Knowledge of Analog design techniques
• knowledge of Unix/Linux operating system
• Strong knowledge of Shell scripting/programming language

• EG-HR-03

• Cairo, Egypt

• Our ideal candidate will be taking roles as well as gaining knowledge and experience in various HR areas such as:
  • Talent Acquisition
  • Talent Management
  • Learning & Development
  • Performance Management
  • HRIS
  • Employee Engagement
  • Organizational Development
  • Employee Relations
  • Internal Communications
  • ISO 9001 quality Management system

• Knowledge:
• Bachelor’s degree in any business-related discipline.
• Additional HR training, studies &/or certifications are highly preferred.
• 0-1 year of experience in the HR field. Previous experience in engineering companies is preferred.
• Skills:
• Excellent English language proficiency is a must. Any additional language is a plus.
• Excellent MS Office knowledge and experience.
• Familiarity/Experience with HR systems.
• Employee Engagement activities and Event Management experience are highly preferred.
• Abilities:
• Diplomacy and excellent communication skills.
• Learning and Development
• Customer-centric
• Teamwork
• Positive thinking
• Initiation and creativity

• EG_LAIP_02

• Cairo, Egypt

• Responsible of physical implementation (layout) of mixed-signal circuits
• Work with design engineers to ensure layout quality
• Plan the placement of major circuit components in an overall physical design
• Work on floor planning and power planning of analog blocks and PHY
• Perform LVS, DRC, DFM, and ERC using the physical verification tools
• Conduct layout reviews with team members and front end team members
• Release design to customers and generating necessary views
• Lead automation of custom layout and porting using scripting languages

• B.Sc./M.Sc. in Electronics Engineering
• 4-9 Years of experience in custom IC layout techniques or EDA tools or relevant experience
• Knowledge of physical verification DRC/LVS/DFM/ERC/MRC/ESD/IO
• Knowledge in basic analog design techniques & EDA tools is essential
• Strong knowledge of Shell scripting/programming languages
• Strong knowledge of Unix/Linux operating systems

• EG_DIG_04

• Cairo, Egypt

• Team planning, resource utilization of projects’ load on the team & act/organize accordingly
• Coaching, monitoring & assessing performance of team members in a way that strengthens two-way communication and reinforces desired behaviors & set training & Development plans
• Work & cooperate closely with the digital design team and Mixed Signal designers to deliver in time and according to required specifications
• Conduct, and contribute to internal design reviews to ensure compliance to the company digital design process
• Develop a thorough understanding of system-level design specifications
• Derive digital design life-cycle from concept phase to product realization
• Contribute to the validation and debugging of the fabricated silicon
• Work independently & with the team and methodically on analyzing design, tool, and technology problems, identifying best solutions, and implementing the solutions in a repeatable fashion that integrates well within the implementation flow
• Meet strict quality and schedule requirements

• B.Sc. or M.Sc. in Electronics Engineering
• 6+ Years of experience in VLSI Digital Design
• Team leadership and project management skills
• Excellent verbal and written communication skills are required
• Excellent follow-up and persistence
• Strong technical judgement and decision making abilities
• Expert knowledge in Verilog RTL coding techniques
• Strong Knowledge of ASIC/FPGA design flows including RTL synthesis, and timing closure of high speed digital designs
• Experience with clock domain crossing and reset architecture
• Knowledge of System Verilog, RTL/gate verification techniques
• Strong knowledge of Shell, Perl, Python and TCL scripting
• Strong knowledge of Unix/Linux operating system

• Contribute as a team player in the development and design of a wide range of Mixed Signal Interface IPs products (SerDes, MIPI, DDR, LVDS... and others).
• Responsible of physical implementation of Mixed Signal circuits
• Work closely with design engineers in the custom layout, physical design and verification of high speed SerDes, TX, RX, PLL, DLL, CDR, LVDS and other mixed signal integrated circuits.
• Plan the placement of major circuit components in an overall physical design.
• Work on floor plan and power plan of Analog blocks and PHY
• Perform LVS, DRC, DFM, ERC and ERC using physical verification tools.
• Execute methodology checks using PERC.
• Help in new PDK evaluations, setting up project layout environment.
• Help in automation of custom layout and porting using scripting languages

Qualifications

• BS from one of following majors: Electronics Engineering, Telecommunications, Mechatronics, Physics, Automation & Control or Computer Science.
• Has 0-3 years of experience in CMOS Analog/Memory layouts.
• For entry level positions, recent graduates with experience in areas that are cross-trainable to Analog Design may be considered, such as: PCB Design, Electronics, Test Engineers, Mechatronics Engineers. However, in these cases, a strong academic record is required.
• Good at conversational and written English
• High interest in a semiconductor career path
• Loves solving technical problems, is a good team player, has a growth mindset (willing to receive constructive feedback and improve), and strives for excellence.
• Is respectful, patient, and easygoing

• Contribute as a team player in the development and design of a wide range of Mixed Signal Interface IPs products (SerDes, MIPI, DDR, LVDS ... and others).
• Responsible for the schematic design, simulation, and verification of blocks in a high-speed mixed-signal IP (Transmitter, Receiver, Serdes, PLL, DLL, CDR, CTLE, FFE/DFE, Clocks, regulators, Bandgap Reference, DAC ...).
  • Note: We have a very broad list of designs that you can learn and gain experience from.
• Work in close cooperation with System Architects, Chip Architects, Digital IC designers and Physical IC Designers to deliver on time and according to required specifications.
• Generate the required documentation and contribute to the validation and debugging of the fabricated silicon.
• Work independently and methodically on analyzing design, tool, and technology problems, identifying the best solutions, and implementing the solutions in a repeatable fashion that integrates well within the implementation flow.

Qualifications:

• BS/MS from one of following majors: Electronics Engineering, Telecommunications, Mechatronics, Physics, Automation & Control or Computer Science.
• Has 0-3 years of experience in CMOS Analog/Memory designs.
• For entry level positions, recent graduates with experience in areas that are cross-trainable to Analog Design may be considered, such as: Embedded System, Electronics, Test Engineers, Mechatronics Engineers, PCB design. However, a strong academic record is required.
• Good at conversational and written English Has high interest in IC design
• Loves solving technical problems, is a good team player, has a growth mindset – willing to take constructive feedback and improve, and strives for excellence.
• Is respectful, patient, and easygoing.

• Upon successful completion of the internship, candidates should:
  • Have fundamental knowledge of IC design
  • Have fundamental knowledge of Mixed-signal IC design and layout
  • Acquire soft skills to become successful in IC design
  • Complete a mini IC project to apply coursework in a real-world environment and to learn about IC design flow, and to build a real design from beginning to end. Includes support for final year students for graduate thesis
  • Acquire tangible experience on live projects and work under the mentorship of experienced engineers

Qualifications:

• Final year student or recent graduate from one of the following majors: Electronics Engineering, Telecommunications, Mechatronics, Physics, Automation & Control or Computer Science
• Preferred GPA is from 3.2/4.0. Candidates with a GPA below 3.2 may be considered in the following cases:
  • Has real experience in Analog IC design (please include in the CV)
  • Graduated from a Gifted high school with Mathematics, Informatic or Physics major
  • Won prizes in Physics, Mathematics, or Informatic at the national, province, or city level during high school
• Basic knowledge about CMOS, Analog, Digital IC design is a plus
• Familiarity with IC design EDA tools (Mentor, Cadence, Synopsys) is a plus
• Good at conversational and written English
• Loves solving technical problems, is a good team player, has a growth mindset (willing to receive constructive feedback and improve), and strives for excellence
• Has high interest in IC design.
• Is respectful, patient and easygoing