Work Scope:

• New IPs requirements analysis and system/architecture definition.
• Building system-level models for validating architectural decisions/trade-offs.
• Complete leadership of projects or sub-systems covering all aspects of planning, status & milestones follow-up.
• Providing mentorship and technical leadership.
• Providing support and guidance for Post-Silicon bench testing/characterization.
• Leading and supporting technical communication channels with customers, vendors, etc…
• Introducing & implementing methodology modifications for enhancing the efficiency of Mixel’s design process & IPs robustness.

Qualifications:

• BSc in Electronics/Communication with 5+ years of experience.
• Hands-on knowledge & experience in A/MS/RF building blocks (PLLs, CDRs, Drivers, AFEs, Biasing & Power Management)
• Strong knowledge of IC design flow using Mentor & Cadence tools.
• Strong knowledge of A/MS behavioral modeling.
• Strong communication, leadership, and analytical skills.
• Experience with Matlab/Simulink is a plus.
• Experience with advanced FinFET process nodes is a plus.

What’s on offer?

At Mixel, we provide a top-notch opportunity that capitalizes on empowerment, innovation, appreciation, support, and encouragement.

In addition, we take pleasure in offering competitive tangible and intangible total rewards packages, all year-long recognitions, celebrations, recreational activities, and above all, a family-friendly environment.

Want to know more? Get in touch now, and let us connect with you for an obligation-free exploration call!

Careers.eg@mixel.com

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