Press Releases

Mixel Achieves Full-Chip Verification of a Programmable 3.2Gbps Quad Transceiver IP with Infinisim RASER

February 01, 2010
Infinisim Inc. announced today that Mixel, a leading provider of silicon-proven mixed-signal Intellectual Property (IP) cores, used Infinisim’s RASER mixed-signal simulator to verify the functionality of a programmable 3.2Gbps quad-lane SerDes chip, demonstrating RASER’s unprecedented capacity and accuracy to handle a full-chip mixed-signal design.

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Mixel Celebrates 10 Years of Mixed-Signal Excellence

May 19, 2009
Mixel Inc., the leader in mobile Mixed-Signal IPs, announced today that it is celebrating its 10-year anniversary. Mixel, incorporated in 1999, has steadily expanded its customer base and product offerings, through organic growth, over the last 10 years. Mixel is privately held and has been consistently profitable since its inception. Even during the current downturn, Mixel continues to experience growth and a strong demand for its mixed-signal IP products.

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Mixel Announces Tape-out of the First Complete MIPI D-PHY IP for Mobile Applications

November 05, 2007
Mixel Inc. today announced availability of the MXL-PHY-MIPI, a MIPI (Mobile Industry Peripheral Interface) standard D-PHY virtual component Intellectual Property (IP). The IP is a MIPI standard revision 0.90 compliant D-PHY allowing bidirectional transfer of video and control data between the host processor and display or camera module. The MXL-PHY-MIPI includes both the Analog and Digital D-PHY blocks.

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Mixel Announces Two New PLLs Featuring Higher Performance, Reduced Power, Cost and Die Area at the 2007 FSA Expo and Conference

September 11, 2007
Mixel Inc. today announced availability of the MXL-PLL-SS, a Spread-Spectrum Phased Locked Loop (SSPLL) solution and MXL-PLL-SYN-HP, a High Precision PLL (HPPLL). The SSPLL is designed to provide greater design flexibility by partitioning the SSPLL into two highly independent blocks: the PLL block and the spread-spectrum block.

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