Careers

Mixel is hiring.Mixel is seeking exceptional, self-driven, team members who are eager to work on cutting edCareerge projects utilizing the latest technologies and tools. If you have Mixed-Signal experience and project management experience, besides being motivated, energetic, and eager to grow in your profession, then come join our team at Mixel and experience working with teams from Silicon Valley and customers around the globe.

Successful applicants will work with highly experienced engineers on the ground floor of a growing company, developing IP cores in the areas of high-performance, low-power PHYs.

Play a critical part in Mixel’s next phase of growth and contribute to its long term success. This can be an once-in-a-lifetime opportunity for the right candidate, and can rapidly lead to larger responsibilities and rewards. Work with Mixed-signal Engineers with decades of experience, on exciting projects designing Mixed-signal CMOS IP cores and Integrated Circuits.

Join Mixel and see your designs working in new and exciting commercially available products. We are enabling the next generation of mobile platforms, IoT, automotive, and wearable.

If you are an intelligent, motivated, and hardworking engineer that would like to be part of an outstanding team, and would enjoy working in an exciting, friendly, professional, fast-paced, and technically challenging environment, then we urge you to email us your resume.

Clear Results

Full-Time
Egypt
Posted 1 month ago
Job Code
  • EG_ IT_01
Location
  • Cairo, Egypt
Main Purpose
  • Responsible for maintaining, monitoring, and troubleshooting both Linux and Windows server environments. The job holder provides cross-functional IT services support and works closely across multiple domains such as software applications, hardware, server management, network, etc. Serves as the first point of contact for internal IT issues
About the Job
  • Provide technical assistance in installation, configuration, administration, support, and maintenance of computers, storage, servers, and databases, for Linux and Windows server environments. 
  • Create Linux Bash and Python scripts. 
  • Administration of MS Office based environment. 
  • Maintain, monitor, and troubleshoot network-based services: AD, TCP/IP protocols, VPN, switching, firewalls, and routing. 
  • Prepare IT written documentation of IT services for the company engineers. 
  • Weekly/monthly health check of different IT activities. 
  • Provide technical support and preventive maintenance.
Job Requirements
  • A bachelor's degree in Engineering, Computer Science, or a similar field is necessary. 
  • 2-3 years of experience in Linux/Windows: CentOS, Redhat, and Windows. 
  • 2-3 years of network experience (LAN, VPN, VLAN, switching). 
  • Ability to create scripts in Bash and Python languages. 
  • Familiarity with the following technologies: (AD, O365, CentOS, TCP/IP, VPN) Desirable Qualifications and Experience: 
  • LPI (Linux Professional Institute) or any equivalent Linux certification. 
  • One of the following Microsoft certifications: MCP, MCSA, or MCSE. 

IT System Administrator

Full-Time
Egypt
Posted 2 months ago
Job Code
  • EG_ ASIP_01
Location
  • Cairo, Egypt
About the Job
  • Develop a thorough understanding of system-level design specifications
  • RTL Coding/Synthesis of the digital part of Mixed Signal IPs
  • Develop behavioral models for the analog parts of Mixed Signal IPs
  • Develop advanced verification environment and test-bench components
  • Working with the mixed signal team on the co-simulation and verification of the IPs
  • Hardware verification of the digital module using cutting edge FPGA kits
Job Requirements
  • Bachelor’s degree of Electronics Engineering. Master’s Degree is a plus
  • 0-3 Years of experience in VLSI Digital Design/Verification, gate verification techniques is a plus
  • Strong knowledge of Verilog RTL design/simulation
  • Knowledge of ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off
  • Knowledge of Unix/Linux operating system is a plus
  • Knowledge of shell scripting/programming languages is a plus

ASIC Design Engineer responsibilities include developing a thorough understanding of system-level design specifications

Full-Time
Egypt
Posted 2 months ago
Job Code
  • EG_ ASIP_02
Location
  • Cairo, Egypt
About the Job
  • Develop a thorough understanding of system-level design specifications
  • RTL Coding/Synthesis of the digital part of Mixed Signal IPs
  • Develop behavioral models for the analog parts of Mixed Signal IPs
  • Working with the verification team to develop advanced test plans
  • Working with the mixed signal team on the co-simulation and verification of the IPs
  • Hardware verification of the digital module using cutting edge FPGA kits
Job Requirements
  • B.Sc. or M.Sc. in Electronics Engineering
  • 3+ Years of experience in VLSI Digital Design
  • Strong knowledge of Verilog RTL design/simulation, gate verification techniques is a plus
  • ASIC/FPGA design flows including RTL synthesis, and timing sign-off
  • Experience with clock domain crossing and reset architecture
  • Working knowledge of Shell, Perl, and TCL scripting
  • Unix/Linux operating system

Senior ASIC Design Engineer responsibilities include developing a thorough understanding of system-level design specifications

Full-Time
Egypt
Posted 3 months ago
Work Scope:
  • New IPs requirements analysis and system/architecture definition.
  • Building system-level models for validating architectural decisions/trade-offs.
  • Complete leadership of projects or sub-systems covering all aspects of planning, status & milestones follow-up.
  • Providing mentorship and technical leadership.
  • Providing support and guidance for Post-Silicon bench testing/characterization.
  • Leading and supporting technical communication channels with customers, vendors, etc...
  • Introducing & implementing methodology modifications for enhancing the efficiency of Mixel’s design process & IPs robustness.

Qualifications:

  • BSc in Electronics/Communication with 7+ years of experience.
  • Hands-on knowledge & experience in A/MS/RF building blocks (PLLs, CDRs, Drivers, AFEs, Biasing & Power Management)
  • Strong knowledge of IC design flow using Mentor & Cadence tools.
  • Strong knowledge of A/MS behavioral modeling.
  • Strong communication, leadership, and analytical skills.
  • Experience with Matlab/Simulink is a plus.
  • Experience with advanced FinFET process nodes is a plus.
What’s on offer? At Mixel, we provide a top-notch opportunity that capitalizes on empowerment, innovation, appreciation, support, and encouragement. In addition, we take pleasure in offering competitive tangible and intangible total rewards packages, all year-long recognitions, celebrations, recreational activities, and above all, a family-friendly environment. Want to know more? Get in touch now, and let us connect with you for an obligation-free exploration call! Careers.eg@mixel.com #Mixel #WorkGlobal_FeelHome #Decode_Your_Future #JoinTheExcellenceTeam #BecomeAMixeler #ApplyNow

Work Scope: New IPs requirements analysis and system/architecture definition. Building system-level models for validating architectural decisions/trade-offs. Complete leadership of projects or sub-sys...

Full-Time
Egypt
Posted 3 months ago
Job Code
  • EG_LAIP_04
Location
  • Cairo, Egypt
About the Job
  • Team planning and team member resource utilization.
  • Conduct weekly meetings with his team members to follow up on the progress of assigned tasks.
  • Attend lead status meetings where the different aspects of the projects are discussed & provide clear status of his team’s assigned projects.
  • Resolving all technical and managerial issues within the team.
  • Monitor the project's load on the team members and act/organize accordingly, to remove stress, or retain balance/fairness in the distribution of workload after agreement with Project Leads, and Team Manager.
  • Perform continuous mentoring through proper performance review standards and process, sets goals, areas for new training, skill checks, the development plan for each team member to help them improve their performance to support the organization's success.
Job Requirements
  • B.Sc./M.Sc. in Electronics Engineering
  • 6+ Years of experience in custom IC layout techniques or EDA tools or relevant experience
  • Knowledge of EDA tools used in analog IC design
  • Knowledge of Physical verification DRC/LVS/DFM/ERC/MRC/ESD/IO
  • Knowledge of Analog design techniques
  • Strong knowledge of Unix/Linux operating system
  • Project management experience is required.
  • Strong knowledge of Shell scripting/programming languages

Job Code EG_LAIP_04 Location Cairo, Egypt About the Job Team planning and team member resource utilization. Conduct weekly meetings with his team members to follow up on the progress of assigned tasks...

Full-Time
Egypt
Posted 4 months ago
Job Code
  • EG_ ASIV_04
Location
  • Cairo, Egypt
About the Job
  • Team planning and team member resource utilization.
  • Hands-on experience with employing constrained-random coverage driven verification methodology using UVM
  • Participating in deploying new methodologies to improve coverage and execution time in collaboration with other experienced engineers on the team
  • Working with the design team to validate and verify any requested design changes throughout the project life cycle.
  • Develop a thorough understanding of system-level design specifications. 
  • RTL Coding/Synthesis of the digital part of Mixed-Signal IPs. 
  • Develop behavioral models for the analog parts of Mixed-Signal IPs. 
  • Working with the verification team to develop advanced test plans. 
  • Working with the Mixed-Signal team on the co-simulation and verification of the IPs. 
  • Hardware verification of the digital module using cutting-edge FPGA kits.
  • Coach your team members in a way that strengthens two-way communication and reinforces desired behaviors.
  • Monitor the project's load on the team members and act/organize accordingly, to remove stress, or retain balance/fairness in the distribution of workload after agreement with Project Leads, and Team Manager.
  • Communicating team goals and identifying areas for new training or skill checks.
  • Develop the Training and Development needs for each employee, and Agree on a development plan to help them improve their performance and support the organization's success.
  • Motivates others by setting a good example and appreciates/provides encouragement to the ongoing effort of the team members.
Job Requirements
  • B.Sc. or M.Sc. in Electronics Engineering
  • 5+ Years of experience in developing SV-based verification environments. 
  • Strong knowledge of Verilog, System Verilog, and object-oriented 
  • Computer skills required: Unix/Linux operating system
  • Strong knowledge of Verilog, System Verilog, and object-oriented programming languages
  • Knowledge of at least one standard verification methodology (such as VMM, OVM, or UVM)
  • Familiarity with RTL design, synthesis, and CDC analysis is a plus
  • Working knowledge of shell, Perl, and TCL scripting is a plus
  • Experience with clock domain crossing and reset architecture. 

Digital Verification Development Team Lead

Full-Time
Egypt
Posted 4 months ago
Job Code
  • ASIV_01
Location
  • Cairo, Egypt
About the Job
  • Hands-on experience with employing constrained-random coverage driven verification methodology using UVM.
  • Working with the design team to validate and verify any requested design changes throughout the project life cycle.
  • Develop test plan from specification and architect system-level verification environments
  • Develop test-bench components, and coverage metrics
  • Execute RTL/Gate level simulations and analyze results
  • Work with the mixed-signal team on the co-simulation and verification of mixed-signal IPs
  • Contribute to design/verification process automation
Job Requirements
  • B.Sc. in Electronics/Computer Engineering
  • Years of experience in the same field: 0-4 Years of experience in developing SV-based verification environments
  • English Language Proficiency: Fluency
  • Computer skills required: Unix/Linux operating system
  • Strong knowledge of Verilog, System Verilog, and object-oriented programming languages
  • Knowledge of at least one standard verification methodology (such as VMM, OVM, or UVM)
  • Familiarity with RTL design, synthesis, and CDC analysis is a plus
  • Working knowledge of shell, Perl, and TCL scripting is a plus

Develop test plans from specifications, architect system level verification environments, test-bench components, and coverage metrics

Full-Time
Egypt
Posted 4 months ago
Job Code
  • EG_ ASIV_03
Location
  • Cairo, Egypt
About the Job
  • Hands-on experience with employing constrained-random coverage driven verification methodology using UVM
  • Participating in deploying new methodologies to improve coverage and execution time in collaboration with other experienced engineers on the team
  • Working with the design team to validate and verify any requested design changes throughout the project life cycle.
  • Develop a thorough understanding of system-level design specifications. 
  • RTL Coding/Synthesis of the digital part of Mixed-Signal IPs. 
  • Develop behavioral models for the analog parts of Mixed-Signal IPs. 
  • Working with the verification team to develop advanced test plans. 
  • Working with the Mixed-Signal team on the co-simulation and verification of the IPs. 
  • Hardware verification of the digital module using cutting-edge FPGA kits.
Job Requirements
  • B.Sc. or M.Sc. in Electronics Engineering
  • 5+ Years of experience in developing SV-based verification environments. 
  • Strong knowledge of Verilog, System Verilog, and object-oriented 
  • Computer skills required: Unix/Linux operating system
  • Strong knowledge of Verilog, System Verilog, and object-oriented programming languages
  • Knowledge of at least one standard verification methodology (such as VMM, OVM, or UVM)
  • Familiarity with RTL design, synthesis, and CDC analysis is a plus
  • Working knowledge of shell, Perl, and TCL scripting is a plus
  • Experience with clock domain crossing and reset architecture. 

Digital Verification Development Staff Engineer

Full-Time
Egypt
Posted 4 months ago
Job Code
  • EG_ ASIV_02
Location
  • Cairo, Egypt
About the Job
  • Hands-on experience with employing constrained-random coverage driven verification methodology using UVM
  • Participating in deploying new methodologies to improve coverage and execution time in collaboration with other experienced engineers on the team
  • Working with the design team to validate and verify any requested design changes throughout the project life cycle.
  • Develop test plan from specification and architect system-level verification environments. 
  • Develop test-bench components and coverage metrics. 
  • Execute RTL/Gate level simulations and analyze results. 
  • Work with the mixed-signal team on the co-simulation and verification of mixed-signal IPs. 
  • Contribute to design/verification process automation. 
Job Requirements
  • B.Sc. or M.Sc. in Electronics Engineering
  • 3+ Years of experience in developing SV-based verification environments. 
  • Strong knowledge of Verilog, System Verilog, and object-oriented 
  • Computer skills required: Unix/Linux operating system
  • Strong knowledge of Verilog, System Verilog, and object-oriented programming languages
  • Knowledge of at least one standard verification methodology (such as VMM, OVM, or UVM)
  • Familiarity with RTL design, synthesis, and CDC analysis is a plus
  • Working knowledge of shell, Perl, and TCL scripting is a plus

Senior ASIC Design Engineer responsibilities include developing a thorough understanding of system-level design specifications

Full-Time
Egypt
Posted 4 months ago
Job Code
  • EG_ ASIV_05
Location
  • Cairo, Egypt
About the Job
  • Team planning and team member resource utilization.
  • Hands-on experience with employing constrained-random coverage driven verification methodology using UVM
  • Participating in deploying new methodologies to improve coverage and execution time in collaboration with other experienced engineers on the team
  • Working with the design team to validate and verify any requested design changes throughout the project life cycle.
  • Develop a thorough understanding of system-level design specifications. 
  • RTL Coding/Synthesis of the digital part of Mixed-Signal IPs. 
  • Develop behavioral models for the analog parts of Mixed-Signal IPs. 
  • Working with the verification team to develop advanced test plans. 
  • Working with the Mixed-Signal team on the co-simulation and verification of the IPs. 
  • Hardware verification of the digital module using cutting-edge FPGA kits.
  • Coach your team members in a way that strengthens two-way communication and reinforces desired behaviors.
  • Monitor the project's load on the team members and act/organize accordingly, to remove stress, or retain balance/fairness in the distribution of workload after agreement with Project Leads, and Team Manager.
  • Communicating team goals and identifying areas for new training or skill checks.
  • Develop the Training and Development needs for each employee, and Agree on a development plan to help them improve their performance and support the organization's success.
  • Motivates others by setting a good example and appreciates/provides encouragement to the ongoing effort of the team members.
Job Requirements
  • B.Sc. or M.Sc. in Electronics Engineering
  • 7+ Years of experience in developing SV-based verification environments. 
  • Strong knowledge of Verilog, System Verilog, and object-oriented 
  • Computer skills required: Unix/Linux operating system
  • Strong knowledge of Verilog, System Verilog, and object-oriented programming languages
  • Knowledge of at least one standard verification methodology (such as VMM, OVM, or UVM)
  • Familiarity with RTL design, synthesis, and CDC analysis is a plus
  • Working knowledge of shell, Perl, and TCL scripting is a plus
  • Experience with clock domain crossing and reset architecture. 

Digital Verification Development Senior Team Lead